With the continuous scaling of complimentary metal-oxide semiconductor (CMOS) devices, the high-K gate dielectric and metal gate stack is required for future CMOS devices with 65 nm technology node and beyond.  The scope of the work includes studies on the high-K gate dielectric and metal gate stack for the future CMOS device application. A new process for Al incorporation into HfO2 will be studied, and interactions between high-k dielectrics and metal gates will be discussed.  Firstly, a high quality MOCVD HfAlO dielectric film using a single cocktail liquid source HfAl(MMP)2(OiPr)5 as a new high-K fabrication method will be demonstrated.  A wide range of composition controllability between HfO2 and Al2O3 in HfAlO is obtained by controlling deposition temperature. The HfAlO film with 90% HfO2, which has minimum sacrifice of K value, shows a great improvement in thermal stability and the significant reduction of leakage current compared to pure HfO2 film.  Secondly, thermal instability of effective work function and its material dependence on metal/high-K gate stack will be presented.  It is found that Si atoms at the interface play a critical role in the thermal instability of effective work function. The behavior of effective work function and the role of Si atoms will be discussed. Lastly, new findings on the Fermi-level pinning phenomenon in FUSI gate/high-K dielectric stack will be discussed. It is found that there is a critical composition ratio (Ccrit) of Ni to Si in Ni-FUSI gate which starts to show a strong Fermi-level pinning and the dep