1. 제 목 : Performance and Applications of InAlN-based High Electron Mobility Transistors

2. 발 표 자 : Clemens Ostermaier (Infineon Austria, Austria)

3. 일 시 : 2011년 03월 15일(화) 17:00 ~ 19:00

4. 장 소 : 공대 11호관 103호

5. 초청교수 : 이정희 교수

6. 강사약력 : (학 력 및 경력)

2002, Bachelor in Electrical Engineering at Vienna University of Technology, Austria

2006, Master in Semiconductor Engineering at Kyungpook Nat’l University, Korea

2008, Ph.D: in Electrical Engineering at Vienna University of Technology, Austria

2011～Present, Infineon Austria, Austria

7. 내용요약 :

This talk covers the properties and applications of InAlN based HEMTs with an indium content of 17% resulting in a lattice-matched barrier layer to the GaN buffer. The main subject is the design and realization of a high electron mobility transistor with a barrier thickness (2 nm) much below conventional devices, attaining enhancement-mode operation. The thinnest stress-free barrier could be realized using lattice-matched InAlN on GaN. The usual trade-off in enhancement-mode devices between the on-resistance and the threshold voltage has been extended by developing a novel passivation scheme using a highly doped GaN cap layer together with a selective recess process for the gate. This cap layer provides a state-of-the-art carrier density in the access region and shields the device channel from charge variations at the surface. This unique independency of surface traps was proven to be free of drain current dispersion without additional passivation, promising excellent device reliability.

Another important design parameter for enhancement-mode devices is the surface potential of the barrier layer. Due to the lack of exact measurement methods of the surface potential, new characterization techniques have been developed allowing the investigation of the effective potential at Schottky and metal-oxide gates. Integration of those results led to an improved design of the ultra-thin barrier device with gate insulation, achieving a threshold voltage above +2V and a maximum feasible gate bias of 10V.

The thin barrier allows detailed analysis of the gate stack, which led to the discovery of a gate sinking effect for GaN devices. This effect was linked to diffusion of oxygen from an interfacial layer into the iridium gate metal and could be utilized to fabricate devices with record transconductance of 640 mS/mm for GaN HEMTs in normally-off operation.

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